Stereo Components Page

Choosing the stereo generator components.

Having decided the specification for the equipment we can choose the components. There are 4 essential areas for which the components are to be selected: The input conversion to digital format, the digital signal processor, the conversion from the digital domain to ther analogue output and synchronisation of these three areas. Together with the power supply and all the "glue" this makes up the stereo generator design.

The Component Selection

We look to using commonly available consumer commponents (for reduced cost). For the analogue input domain the upper frequency is 15KHz giving a minimum sampling frequency of 30KHz. The standard sampling frequencies for consumer ADC are 32Khz, 44.1KHz and 48KHz. this could be higher but an integral multiple of the DAC sampling is required. The common consumer DAC, used in DVD players have a maximum sampling rate of 192KHz, so this determines that a 48KHz sampling input is to be used.

The standard word format for both professional and high end consumer equipment is 24 bits, for both analogue and digital (AES3/EBU) sources. Thus for convenience a 32bit floating point digital processor is selected. A fixed point 24bit processor would be slightly cheaper but since stereo generators are a minority professional products a floating point dsp was adopted for the extra ease of software design and flexibilty.

Both the ADC and DAC formats have to be compatible with the DSP, so avoiding the possiblity of interface problems, the same manufacture was choosen for all three main components. After all any problems with interfacing and and software support are much easier to solve if the same "house" is used (no buck passing).

The Digital Signal processor (DSP)

The original stereo generator design (now some 12 years old as of 2015) adopted the Analogue Device ADSP21161 processor. This is a 32bit, 100MHz, floating point SIMD (Single Instruction Multiple Data) processor. One important consideration is the software design IDE and the Analogue Visual Studio is comprehensive in features, easy to use and has a good JTAG port for debugging. however on the downside the encapsulation uses ball pads.

The software design is asynchronous (via interrupts) so the internal working frequency can vary, provided all the processing is done in the time between input samples. A 100MHz clock was adopted since this allows a common 25MHz cristal to be used.

The boot code can be held in 8 bit flash, EPROM or PROM connected to the 32 bus. No external memory is required since the internal DSP memory is sufficient to hold all the code. The 32 bit bus is used to interface to LED bar displays via buffer latch to show the input and output signal levels. Each bank of buffer latch emulate a single address memory bank so that the DSP takes care of all the address interpolation and memory interface.

Later the ADSP21488 400MHz processor was employed to embed the stereo generator + RDS generator in a digital direct synthesis FM modulator on a post card size board.

The Digital Analogue Convertor (DAC)

Although the DSP does all the computation of the MPX signal it is the DAC that synchronises the whole of the process. The DAC extracts the MPX samples in synchronisation with the entry of the ADC samples to the DSP. There is a master Xtal clock at 12.288MHz (48KHz * 256) that drives both the DAC and ADC. The DAC internally generates a 192KHz sample rate that extracts the MPX data from the DSP. The ADC derives a 48KHz sample rate from the same clock, thus the two are synchronised in time but not phase.

The DAC extracts the MPX data from the DSP using a DMA (Direct Memory Access) feature of the DSP. Thus the DAC extracts the data when required and independently of the the DSP processing. This eliminates any possible timing jitter due to the fact that the DSP processing time is not deterministic. (The DSP processing time depends upon the filter selections, audio processing etc...). Since the whole proceedure is synchronised to the 12.288MHz this clock has to be highly stable in order that both the 19KHz pilot and 38KHz subcarrier are accurate in frequency.

The Analog Device AD1852 stereo DAC choosen is a common DVD, set top component, readily available and cheap. This component features dual channel, 24bit conversion at 192KHz for a MPX signal only one channel is required up to 53KHz. The second channel is used to generate a pilot reference signal that can be used for parallel synchronisation of an external RDS generator. The DAC is driven by a multiplexed data stream from the DSP, one channel being the MPX signal, the other a digital pilot waveform.

The DAC output is balanced so a balanced to unbalanced line receiver is used for the MPX signal. The pilot channel uses a balanced input filter to achieve the same effect since preserving the common mode rejection over a wide frquency range is not so important as for the MPX signal.

The Analogue Digital Convertor (ADC)

The Analog Device AD1871 sigma-delta dual channel (stereo) ADC is used for the analogue input. The DSP assumes a standard +12dbm(600) reference level to generate a 3.5v Pk.Pk level at the output level. Since there are three other standard audio reference levels (-6, 0, +4), the internal drive amplifier is used to scale these input levels to the same +12dbm(600) reference level. This is done by connecting the SPI port to the DSP. A 2Hz High Pass Filter is also configured to remove any residual very low frequency rumble and any stray DC component.

The ADC uses the same 12.288MHz clock source as the DAC to internally generate the 48KHz sample rate. Any digital noise must be kept away from the analogue inputs since the inputs are extremely sensive to noise, leakage and layout if the full 24bit dynamic range is to achieved.

The Glue

This refers to all the components that are required for the three afore mentioned to work harmoniously together. It has already been stated that a master 12.288MHz clock frequency is used to synchonise all signalling. In reality a 24.576MHz Xtal oscillator was used. This was used directly as the clock for DSP (DSP clock 4 x 24.576 = 98.304MHz). Slightly less than the maximum possible but still giving a maximum processing time of some 17µSec, well below the 48KHz sample time limit.

A synchronous divider was used to derive the 12.288MHz master clock and the frame clocks for the ADC and DAC.

The only other major glue components are the latches to drive a LED bar display that indicates the input signal levels and output MPX signal level. The DSP calculates the on-off state of the LEDs then writes the binary value to the latches as a standard memory write. The DSP can calculate any of the common measuerment presentations, peak, VU, rms etc... and the an attach release algoritm used.

The Power Supply

The choice was made to use a standard linear regulator supply rather than a switching regulator to directly provide power to the stereo generator components for reasons of low noise generation. The trade off is high power dissipation if there is much variation in the nominal 240Vac or 220Vac. Also a second transformer tap is required if the 110Vac market is to be catered for.

Taking the lowest main supply voltage expected, design the regulators, take the highest main supply voltage expected and calculate the regulator dissipation. Knowing dissipation and maximum currents a suitable regulator can be choosen (Low drop out regulators are best here). Now the heatsink size can be determined and the need or otherwise for forced cooling. having done the calculations it may be found that the heatsink size is excessive or forced cooling costs too high. In this case the tradeoff is to incorporate a switched mode pre-regulator either direct AC-DC or DC-DC. The linear regulators can then be run with a known constant voltage drop and maximum dissipation, allowing the minimum heatsink size to be employed.

Both approaches have been employed. A 19" rack with plenty of space used a pure linear design whereas a very compact design used on board linear low drop regulators with a separate off board switched mode AC-DC power supply. Leaving the switched supply as floating a balanced mode filter was used to remove the switching spikes prior to the linear regulators. This proved to have a stereo generator specificaton as good as the rack design.

A Digital Input or Output

The digital input requires an asynchronous digital receiver for AES3/EBU data stream. This allows the external clock frequecy to be decoupled from the internally used master clock frequency. Without an asynchronous receiver to buffer the digital stream the stereo generator would have to synchronised to an external studio clock. Not an ideal approach!!

The AES3/EBU receiver automatically interpolates/decimates the incoming data stream to match the expected internal clock rate. Back in the early 200x years an external chip form the Crystal series had to be used. With the event of the Analog Device Sharc family 2114xx, 2115xx series the asynchronous receiver is incorporated within the DSP. I only an audio ADC was incorporated the stereo generator design would become much simpler.

If a digital FM modulator is in use then there is not much point in generating an analogue MPX signal. Just buffer the DSP data stream and interface to the modulator. As mentioned this has been done interfacing a direct frequency chip to the DSP. The ADSP21488 + AD9918 pair is a good choice allowing direct synthesis of the FM signal in the Band II broadcast band. Also the AD9918 can be modulated at a high sample rate (eg 3,072MHz) so reducing considerable the DAC alias.