The SPORT ports of the DSP are special ports tha can run in an autonomous mode from the DSP core. The SPORT read or writes the data and generates an interrupt when the action is complete.
All the SPORTS are configured in a similar manner, though the output SPORT is the most verbose due to the length of the Ring Buffer employed. In essence we set up a chain script that the DMA follows to obtain and present the correct data to the data stream generated by the DAC.
tx1_tcb0a.ii = &tx1_buf[0]; // DMA destination buffer address
tx1_tcb0a.gp = (unsigned)&tx1_buf[24];
tx1_tcb0a.cp = &tx1_tcb0b.ii; // ptr to next TCB
tx1_tcb0b.ii = &tx1_buf[2]; // DMA destination buffer address
tx1_tcb0b.gp = (unsigned)&tx1_buf[24];
tx1_tcb0b.cp = &tx1_tcb0c.ii; // ptr to next TCB
tx1_tcb0c.ii = &tx1_buf[4]; // DMA destination buffer address
tx1_tcb0c.gp = (unsigned)&tx1_buf[24];
tx1_tcb0c.cp = &tx1_tcb0d.ii; // ptr to next TCB
tx1_tcb0d.ii = &tx1_buf[6]; // DMA destination buffer address
tx1_tcb0d.gp = (unsigned)&tx1_buf[24];
tx1_tcb0d.cp = &tx1_tcb0e.ii; // ptr to next TCB
tx1_tcb0e.ii = &tx1_buf[8]; // DMA destination buffer address
tx1_tcb0e.gp = (unsigned)&tx1_buf[0];
tx1_tcb0e.cp = &tx1_tcb0f.ii; // ptr to next TCB
tx1_tcb0f.ii = &tx1_buf[10]; // DMA destination buffer address
tx1_tcb0f.gp = (unsigned)&tx1_buf[0];
tx1_tcb0f.cp = &tx1_tcb0g.ii; // ptr to next TCB
tx1_tcb0g.ii = &tx1_buf[12]; // DMA destination buffer address
tx1_tcb0g.gp = (unsigned)&tx1_buf[0];
tx1_tcb0g.cp = &tx1_tcb0h.ii; // ptr to next TCB
tx1_tcb0h.ii = &tx1_buf[14]; // DMA destination buffer address
tx1_tcb0h.gp = (unsigned)&tx1_buf[0];
tx1_tcb0h.cp = &tx1_tcb0i.ii; // ptr to next TCB
tx1_tcb0i.ii = &tx1_buf[16]; // DMA destination buffer address
tx1_tcb0i.gp = (unsigned)&tx1_buf[8];
tx1_tcb0i.cp = &tx1_tcb0j.ii; // ptr to next TCB
tx1_tcb0j.ii = &tx1_buf[18]; // DMA destination buffer address
tx1_tcb0j.gp = (unsigned)&tx1_buf[8];
tx1_tcb0j.cp = &tx1_tcb0k.ii; // ptr to next TCB
tx1_tcb0k.ii = &tx1_buf[20]; // DMA destination buffer address
tx1_tcb0k.gp = (unsigned)&tx1_buf[8];
tx1_tcb0k.cp = &tx1_tcb0l.ii; // ptr to next TCB
tx1_tcb0l.ii = &tx1_buf[22]; // DMA destination buffer address
tx1_tcb0l.gp = (unsigned)&tx1_buf[8];
tx1_tcb0l.cp = &tx1_tcb0a.ii; // ptr to next TCB
tx1_tcb0i.ii = &tx1_buf[24]; // DMA destination buffer address
tx1_tcb0i.gp = (unsigned)&tx1_buf[16];
tx1_tcb0i.cp = &tx1_tcb0j.ii; // ptr to next TCB
tx1_tcb0j.ii = &tx1_buf[26]; // DMA destination buffer address
tx1_tcb0j.gp = (unsigned)&tx1_buf[16];
tx1_tcb0j.cp = &tx1_tcb0k.ii; // ptr to next TCB
tx1_tcb0k.ii = &tx1_buf[28]; // DMA destination buffer address
tx1_tcb0k.gp = (unsigned)&tx1_buf[16];
tx1_tcb0k.cp = &tx1_tcb0l.ii; // ptr to next TCB
tx1_tcb0l.ii = &tx1_buf[30]; // DMA destination buffer address
tx1_tcb0l.gp = (unsigned)&tx1_buf[16];
tx1_tcb0l.cp = &tx1_tcb0a.ii; // ptr to next TCB
*(int*)SPCTL2=0; // emptied
*(int*)SPCTL2=SPEN_A|SLEN32|OPMODE|SDEN_A|SCHEN_A|DDIR;
// Turn on sport2 dma
The DMA script goes in groups of three parameters over a run of four data pairs in a continuous loop. The last data group self re-directs to the begining of the sequence. The last command sets up the format parameters for the port. Finally the port has to be activated at the correct moment whn the equipment is total configured and the core loop on the point of starting.
The port is triggered in the core loop by doing:
// Kick off DAC DMA
r1=8;
r0=_tx1_tcb0a;
r2=r0+r1;
dm(CP2A)=r2;